Hardware validation is essential when the hardware is to be used in a process or task that can have any effect on the quality, safety, efficacy of the product or product mandated data.
Complex systems that are used in cost-critical and life-critical applications motivates the need for a systematic approach to verifying functionality. Hardware verification complexity has increased to the point that it can dominate the cost of design. In order to manage the complexity of the problem, we have to investigate validation techniques, in which functionality is verified by simulating (or emulating) a system description with a given test input sequence.
However, formal techniques suffer from high complexity, so the verification of large designs using formal techniques alone is often intractable. The complexity of validation can be made tractable by using a test sequence of reasonable length, and the degree of certainty provided can become arbitrarily close to 100%.
A practical difficulty in the validation of large hardware systems is choosing the proper design abstraction level which provides a trade-off between simulation complexity and error modelling accuracy. In practice, validation is performed at all levels of abstraction from behavioral down to layout. Behavioral hardware description languages, such as VHDL and Verilog, have only been fully accepted by industry for less than a decade, and research in behavioral validation is still developing.
Growing advances in VLSI technology have led to an increased level of complexity in current hardware systems. Late detection of design errors typically results in higher costs due to the associated time delay as well as loss of production.
Thus it is important that hardware designs be free of errors. Formal verification has become an increasingly important technique towards establishing the correctness of hardware designs. In this article we survey the research that has been done in this area, with an emphasis on more recent trends.
We have to present a classification framework for the various methods, based on the forms of the specification, the implementation, and the proff method. This framework enables us to better highlight the relationships and interactions between seemingly different approaches.
Importance of procurement. Contamination.
When an analysis of an end user's
procurement priorities is made; the importance of the equipment /
programs being capable of being validated, ranks at number two out of
ten; second only to delivery; with cost trailing in at sixth position.
This has certainly been consistently true in over 80% of all cases we
have been involved with.
For the-would-be purchaser, it gives enormous reassurance to
know that regulatory-compliant validation protocols and plans are
supplied or at least available. They are normally quite willing to pay a
15 to 30 percent surcharge for these documents.
If outside consultants are hired to produce the full suite of
validation documents (8/9 documents) considerable costs are involved.
However it is the question
“is the system / program actually capable of being validated?”
That makes people hesitate. In my twenty years as an auditor, I can recall many instances where the validation had to be abandoned. This was usually attributable to inadequate documentation of derivation, development and certification processes for software and or materials.
The FDA have actually stated that 70% of validation problems are directly related to none compliant procurement methods.
This is why the User Requirements Specification (URS) has to be an in depth exhaustive study of all the requisite and mandated requirements, including procurement/training/servicing/calibration/facility and utility requirements. The end user has the task of initiating this study; however they should not hesitate in co-opting all the specialist advice and assistance available.